REDUCE

26.4 Size of Address Space

The tradition PSL model is high tagged, i.e. a tag which describes the data type is stored in the high bits of a LISP item. In most cases the number of bits used for tagging is 5, which limits the address space to bitsperword - 5 bits. This has not been a problem for a long time for the widely used 32 bit microprocessor architectures, since the swap space available was much less that this number. E.g on a Sparc system you can use about 100 MB LISP workspace, about 7000000 LISP items.

For the time being the 64 bit microprocessors do not suffer from this limitation. A low tagged version of PSL is under development already since 1990.